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37 Minor width parameters name change.

Scan Out support.

Register constant value parameter at cell exit. If contant value input to the cell doesn't go out, this is useful for the last grid in the array grid and saves some registers.

K now flows upwards to: a K pipe flowing to the distance comparison row was added.
jguarin2002 5562d 21h /
36 Minor width parameters name change. jguarin2002 5562d 21h /
35 Everything is going to the same directory.... jguarin2002 5562d 21h /
34 + rayxsphereGrid.vhd :

RayxsphereGrid is a grid built on floor0Row floor1Row and floor2Row blocks.

+ gridCube.vhd :

gridCube is a cube built on top of rayxsphereGrids....
gridCube intention is to scale a single rayxsphereGrid perfomance.
jguarin2002 5567d 12h /
33 - Wrote some comments.
- The Power Grid Package is finished!. Though... it should be called Power Cube Package.
jguarin2002 5567d 12h /
32 Added floor2Row.vhd

Some changes pro code legibility.
jguarin2002 5571d 03h /
31 A more comprehensive scan chain. jguarin2002 5571d 16h /
30 floor1Row.vhd: an entire K comparison cells row, with parameterizable number of cells. jguarin2002 5573d 08h /
29 kComparison signal control added. jguarin2002 5573d 08h /
28 Ray Intersection Test, Pipe enable clock. jguarin2002 5573d 08h /
27 GPL License. And comments removed. jguarin2002 5573d 09h /
26 Independent "row through" signals for each cell in the row. jguarin2002 5573d 09h /
25 floor0Row : an entire dot product cell rows. With parameterizable cell numbers. jguarin2002 5573d 10h /
24 Typos...... jguarin2002 5573d 11h /
23 A 1 stage pipe 3 operand simultaneous adder, with parameterizable width. jguarin2002 5573d 13h /
22 Package file declarations :

Declared component for arithmetic functions.
jguarin2002 5573d 13h /
21 A 1 stage minimun distance comparer.

This block turns out to be a collection of instances:

{LT+SCANFFx2}
jguarin2002 5573d 13h /
20 I must check that there are no latches inferred in what I want to be DFF with enable signals.

The 1 stage pipe K comparison cell.
jguarin2002 5573d 13h /
19 Added some control signals.
Added a 3 operands 36 bits adder (12 ns)-> 1 stage pipe.
Added a 18x18 bits multiplier (10 ns) -> 1 stage pipe.
So... the dot cell goes upwards on a two stage pipe:

STAGE1:{M(2,18)P1x3} STAGE2:{A(3,36)P1x1}
jguarin2002 5573d 13h /
18 The GPL license. jguarin2002 5586d 18h /

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