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Rev Log message Author Age Path
32 Added old uploaded documents to new repository. root 5714d 22h /
31 New directory structure. root 5714d 22h /
30 hexconv.pl nmoved to /asm, where it is actually used ja_rd 5735d 04h /
29 File list updated with new files ja_rd 5735d 04h /
28 These CP/M assembler output files are no longer used
because CP/M assembler is no longer used
ja_rd 5735d 04h /
27 Brief instructions for batch script ja_rd 5735d 04h /
26 Builds test bench from vhdl template and assembly source
relies on TASM to do the assembly
ja_rd 5735d 04h /
25 Moved from /util
Added comments and generally improved options
ja_rd 5735d 04h /
24 Totally changed -- tests interrupts using simulated interrupt controller in hdl test bench
Code reformatted for TASM
ja_rd 5735d 04h /
23 Code reformatted for TASM ja_rd 5735d 04h /
22 Totally changed -- vhdl code generated from a template
Interrupts tested from software using a simulated interrupt controller
ja_rd 5735d 04h /
21 Totally changed -- vhdl code generated from a template ja_rd 5735d 04h /
20 VHDL template for test benches ja_rd 5735d 05h /
19 Fixed a bug (intr pulses longer than 1 clock cycle failed in some circumstances)
Added an output to the core to mark the fetch cycle of all instructions
Started to add timing diagrams
ja_rd 5735d 05h /
18 Uncluttered the signal display a bit ja_rd 5735d 05h /
17 Comments added ja_rd 5821d 07h /
16 adding LST filed generated by TASM ja_rd 5821d 08h /
15 Names and contents of some files changed ja_rd 5821d 08h /
14 Syntax changed from CP/M ASM to DOS TASM
Success code changed
ja_rd 5821d 08h /
13 Minor changes in embedded code changed (success code now stands out better visually)
Comments added explaining the TB mechanincs
ja_rd 5821d 08h /

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