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Rev Log message Author Age Path
34 rs232 sanitized and parametrized ja_rd 5634d 08h /
33 Added old uploaded documents to new repository. root 5764d 22h /
32 Added old uploaded documents to new repository. root 5765d 11h /
31 New directory structure. root 5765d 11h /
30 hexconv.pl nmoved to /asm, where it is actually used ja_rd 5785d 17h /
29 File list updated with new files ja_rd 5785d 17h /
28 These CP/M assembler output files are no longer used
because CP/M assembler is no longer used
ja_rd 5785d 17h /
27 Brief instructions for batch script ja_rd 5785d 17h /
26 Builds test bench from vhdl template and assembly source
relies on TASM to do the assembly
ja_rd 5785d 17h /
25 Moved from /util
Added comments and generally improved options
ja_rd 5785d 17h /
24 Totally changed -- tests interrupts using simulated interrupt controller in hdl test bench
Code reformatted for TASM
ja_rd 5785d 17h /
23 Code reformatted for TASM ja_rd 5785d 17h /
22 Totally changed -- vhdl code generated from a template
Interrupts tested from software using a simulated interrupt controller
ja_rd 5785d 17h /
21 Totally changed -- vhdl code generated from a template ja_rd 5785d 17h /
20 VHDL template for test benches ja_rd 5785d 17h /
19 Fixed a bug (intr pulses longer than 1 clock cycle failed in some circumstances)
Added an output to the core to mark the fetch cycle of all instructions
Started to add timing diagrams
ja_rd 5785d 17h /
18 Uncluttered the signal display a bit ja_rd 5785d 17h /
17 Comments added ja_rd 5871d 20h /
16 adding LST filed generated by TASM ja_rd 5871d 20h /
15 Names and contents of some files changed ja_rd 5871d 20h /

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