URL https://opencores.org/ocsvn/m1_core/m1_core/trunk

Subversion Repositories m1_core

[/] - Rev 25

Rev	Log message	Author	Age	Path
25	For now the top-level for synthesis is just m1_cpu	fafa1971	6128d 00h	/
24	Corrected include dirs	fafa1971	6128d 00h	/
23	New script using the correct command file for synthesis with Xilinx ISE WebPack	fafa1971	6128d 00h	/
22	Added script file for synthesis with Xilinx ISE WebPack	fafa1971	6128d 00h	/
21	First revision (you should substitute '~' char with real path).	fafa1971	6134d 18h	/
20	Used only lower bits also for SRAV instruction.	fafa1971	6153d 06h	/
19	Added changes suggested by Paolo Piscopo & Simone Lunardo to fix the bugs they found.	fafa1971	6163d 01h	/
18	Limited range of SHAMT (shift amount) to be only 5 bits ([4:0])	fafa1971	6163d 01h	/
17	Added functional verification tests written by Simone Lunardo & Paolo Piscopo.	fafa1971	6163d 01h	/
16	Corrected some bugs found by Simone Lunardo and Paolo Piscopo.	fafa1971	6207d 00h	/
15	Added default case for ALU.	fafa1971	6207d 01h	/
14	Added "lain.ux"-style check for existance of M1_ROOT environment variable before proceeding.	fafa1971	6272d 05h	/
13	Final version of synthesis script at 250 MHz.	fafa1971	6284d 00h	/
12	New synthesis script.	fafa1971	6284d 00h	/
11	First version.	fafa1971	6284d 00h	/
10	The leading "." char has been stripped away to simplify Unix file identification.	fafa1971	6284d 00h	/
9	Now links the setup file	fafa1971	6284d 00h	/
8	Technology independent setup file	fafa1971	6284d 00h	/
7	It should not stay here!	fafa1971	6300d 02h	/
6	Removed old CVS branches from CPU code.	fafa1971	6300d 02h	/