URL https://opencores.org/ocsvn/manchesterwireless/manchesterwireless/trunk

Subversion Repositories manchesterwireless

[/] - Rev 14

Rev	Log message	Author	Age	Path
14	Removed Xilinx warning caused by missing signals in sensitivity list	kingmu	5707d 17h	/
13	Merged rewrite of singleDouble into trunk	kingmu	5708d 15h	/
12	Trivial updates	kingmu	5714d 21h	/
11	This is a perl model which functionally simulates manchester encoding and decoding.	thiagu_comp	5716d 07h	/
10	This folder contains the perl model, which functionally simulates manchester encoding and decoding. This can be used to validate the HDL model.	thiagu_comp	5716d 07h	/
9	Modified next state logic to avoid gated clock on net clock_zero_en_0000 during bitgen process. As a default case the counter enables are de-asserted.	thiagu_comp	5719d 08h	/
8	Removed old singleDouble and added .ucf	kingmu	5722d 10h	/
7	Added new singleDouble files	kingmu	5722d 10h	/
6	Branching trunk to experiment with new singleDouble module	kingmu	5722d 11h	/
5	Tagging 1.0 release	kingmu	5722d 20h	/
4	Updated simulation files to reflect new module names	kingmu	5727d 15h	/
3	Renamed files/modules. Added documentation.	kingmu	5727d 15h	/
2	initial commit	kingmu	5728d 16h	/
1	The project was created and the structure was created	root	5735d 07h	/