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Rev Log message Author Age Path
16 Documentation update, minor fixes mikel262 6772d 20h /
15 Redesigned. Fully pipelined, always ready for data design mikel262 6772d 22h /
14 This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_4'. 6776d 21h /
13 performance improved by 8%, latency reduced to 94 cycles mikel262 6776d 21h /
12 This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_3'. 6777d 20h /
11 changed ROM memory model to synchronous mikel262 6777d 20h /
10 + moved memory allocation request to where it should be
+ reduced latency to 104 cycles
mikel262 6778d 22h /
9 This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_2'. 6781d 09h /
8 Updated DOC mikel262 6781d 09h /
7 documentation update. minor area optimization. mikel262 6781d 20h /
6 minor updates mikel262 6782d 20h /
5 This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_1'. 6782d 21h /
4 area optimization - 100 slices less mikel262 6782d 21h /
3 This commit was manufactured by cvs2svn to create tag 'MDCT_B10'. 6783d 09h /
2 Initial import (Beta Release) mikel262 6783d 09h /
1 Standard project directories initialized by cvs2svn. 6783d 09h /

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