URL https://opencores.org/ocsvn/minimips_superscalar/minimips_superscalar/trunk

Subversion Repositories minimips_superscalar

[/] - Rev 10

Rev	Log message	Author	Age	Path
10	Matrix/Vector multiplication by constant. (binary)	mcafruni	2120d 18h	/
9	Matrix/Vector multiplication by constant.	mcafruni	2120d 18h	/
8		mcafruni	2151d 16h	/
7	Uploading missing file 'pps_pf.vhd'.	mcafruni	2151d 16h	/
6	This is the assembly gasm modified that include a multiplication instruction which operands are 16-bit wide.	mcafruni	2164d 05h	/
5	6x6 Matrix multiplication (ingenuous algorithm) msx.bin: uses 16-bit operands multiplication instruction (mult2 rd, rs, rt). m6x.bin: uses 32-bit operands original multiplication instruction (mult rs, rt) and the move instruction (mflo rd) after.	mcafruni	2164d 13h	/
4	It needs to be tested on more useful and real benchmarks to reveal possible instruction sequences not supported by the architecture. Suggestions are welcome.	mcafruni	2164d 13h	/
3		mcafruni	2164d 14h	/
2		mcafruni	2164d 14h	/
1	The project and the structure was created	root	2165d 00h	/