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Rev Log message Author Age Path
350 root 5718d 18h /
349 Added help text for bootldr target rhoads 5749d 14h /
348 Added comment for 32MB and 128MB DDR parts rhoads 5749d 14h /
347 Xilinx ISE Project file rhoads 5749d 14h /
346 Support optional 4KB cache rhoads 5786d 14h /
345 Commented out optional mult speedup rhoads 5790d 10h /
344 Fixed compiler warning rhoads 5790d 10h /
343 Initial working cache rhoads 5790d 10h /
342 Changed simple cache rhoads 5790d 10h /
341 Permit large file transfers when running on windows rhoads 5790d 10h /
340 Get the length of a file rhoads 5790d 10h /
339 Format output of ls rhoads 5790d 10h /
338 Fix filename problem with 9th file in directory rhoads 5790d 10h /
337 Initial attempt at a cache rhoads 5795d 15h /
336 Better support Linux rhoads 5828d 07h /
335 Use enable signal for byte_we rhoads 5837d 09h /
334 Short time for averaging read signal for 12.5 MHz case rhoads 5847d 08h /
333 Updated Altera lpm_ram_dp usage for Cyclone FPGAs rhoads 5847d 08h /
332 Updated Altera lpm_ram_dp rhoads 5847d 08h /
331 Commented out unconnected signals rhoads 5908d 09h /

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