OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] - Rev 33

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
33 default pipeline changed to old version, there seems to be an occasional error with new version. JonasDC 4315d 06h /
32 new systolic pipeline structure now has split pipeline support, tested and verified in simulation. the core now uses this pipeline by default. JonasDC 4315d 07h /
31 put first cell logic of the pipeline in a separate design unit, tested and working JonasDC 4315d 13h /
30 put last cell logic of the pipeline in a separate design unit, tested and working JonasDC 4315d 13h /
29 added software for generation of test input for the tesbenches JonasDC 4316d 02h /
28 updated makefile for new pipeline sources JonasDC 4316d 03h /
27 test input values for multiplier_tb JonasDC 4316d 03h /
26 testbench for only the montgommery multiplier JonasDC 4316d 03h /
25 first version of new pipeline design. allows for more flexibility in nr of stages.
does not support split pipeline support yet. currently only works for single pipeline
JonasDC 4316d 03h /
24 changed names of top-level module to mod_sim_exp_core JonasDC 4319d 12h /
23 added descriptive comments JonasDC 4319d 13h /
22 updated the systolic pipeline with descriptive signal names and comments JonasDC 4322d 07h /
21 changed x_i signal to xi JonasDC 4323d 14h /
20 added comments, changed signal name of x_reg_i to x_reg.
File is now according to OC design rules
JonasDC 4323d 14h /
19 updated files with descriptive comments
changed signal names and removed redundant signals in stepping_logic
JonasDC 4328d 10h /
18 updated stages with comments and renamed some signals for consistency JonasDC 4329d 09h /
17 updated files with descriptive comments and removed unnecessary signals in standard stage. Files are now according to OC design rules JonasDC 4329d 14h /
16 package with modified generic parameter for register_n JonasDC 4330d 03h /
15 changed generic for register width from n to width for consistency JonasDC 4330d 03h /
14 changed comments, file is now according to OC design rules JonasDC 4330d 04h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.