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Subversion Repositories neo430

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Rev Log message Author Age Path
175 huge update - see change log in processor's documentary (NEO430.pdf) zero_gravity 1656d 19h /
174 - minor edits zero_gravity 1666d 02h /
173 - minor edits zero_gravity 1667d 07h /
172 - bootloader bug-fix
- cpu size optimizations
- readme.md optimizations
zero_gravity 1671d 00h /
171 - minor layout edits zero_gravity 1671d 17h /
170 - newest project version - see documentary's changelog zero_gravity 1671d 17h /
169 - re-init of repository zero_gravity 1671d 17h /
168 - re-init op repository zero_gravity 1671d 17h /
167 - added instruction set cheat sheet
- TWI module now supports clock stretching
zero_gravity 1707d 16h /
166 - updated doc with implementation results for Lattice ice40 ultraplus FPGA
- removed flto compiler switch from makefiles
zero_gravity 1713d 16h /
165 - updated makefiles
- minor edits
zero_gravity 1715d 20h /
164 - fixed linking issue with math.h in makefiles - floating point types and operations are now fully supported! zero_gravity 1723d 22h /
163 re-init of project's svn - final zero_gravity 1726d 19h /
162 re-init of project svn zero_gravity 1726d 19h /
161 - minor edits and updates zero_gravity 1971d 14h /
160 - added TWI module, split USART into sPI and UART modules zero_gravity 2028d 16h /
159 - fixed error in external IRQ latency
- fixed some typos in documentary
zero_gravity 2043d 19h /
158 fixed error in memory layout graphic zero_gravity 2069d 20h /
157 - IO devices can only be written in 16-bit mode
- updated Wishbone driver
zero_gravity 2082d 20h /
156 - fixed errors in interrupt vector addresses in doc/NEO430.pdf
- added common include path to main compile scripts
- changed implementation style of boot ROM for easier mapping onto block ram (quartus)
zero_gravity 2082d 22h /

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