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Subversion Repositories neo430

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Rev Log message Author Age Path
185 - added travis ci infrastructure
- added lattice ice40up specific memory modules
- updated makefiles
- added ghdl support		 zero_gravity 1575d 02h /
184 - replaced CASe structure to prevent some EDA tools complaining (GHDL) about not locally static choices zero_gravity 1576d 04h /
183 finally deprecated support of the DADD instruction zero_gravity 1577d 03h /
182 - bootloader now uses SPI flash (e.g., the FPGA configuration memory) for image storage zero_gravity 1578d 03h /
181 - added missing uart_get_baudrate function
- minor edits		 zero_gravity 1583d 11h /
180 fixed crash issue in bootloader when uploading programs larger than 16kB zero_gravity 1585d 03h /
179 added master acknowledge (MACK) feature to TWI unit & documentation & according SW driver funtions zero_gravity 1590d 04h /
178 - new project version available! see chengelog in neo430.pdf for more details zero_gravity 1591d 06h /
177 added run/stop flag to timer, added coremark benchmark zero_gravity 1638d 04h /
176 added SW interrupts to EXIRQ controller zero_gravity 1645d 08h /
175 huge update - see change log in processor's documentary (NEO430.pdf) zero_gravity 1652d 05h /
174 - minor edits zero_gravity 1661d 12h /
173 - minor edits zero_gravity 1662d 17h /
172 - bootloader bug-fix
- cpu size optimizations
- readme.md optimizations		 zero_gravity 1666d 09h /
171 - minor layout edits zero_gravity 1667d 02h /
170 - newest project version - see documentary's changelog zero_gravity 1667d 03h /
169 - re-init of repository zero_gravity 1667d 03h /
168 - re-init op repository zero_gravity 1667d 03h /
167 - added instruction set cheat sheet
- TWI module now supports clock stretching		 zero_gravity 1703d 02h /
166 - updated doc with implementation results for Lattice ice40 ultraplus FPGA
- removed flto compiler switch from makefiles		 zero_gravity 1709d 02h /

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