| Rev |
Log message |
Author |
Age |
Path |
| 168 |
Simplified write data path logic,
Converted RTC to packed BCD,
Corrected several bugs in real time clock component, |
jshamlet |
3938d 06h |
/ |
| 167 |
Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow.
Added several useful modules that use the Open8 bus. |
jshamlet |
3946d 05h |
/ |
| 166 |
fixed additional issues with range checking on PCREL relocations for open8, added test cases to verify, catch tree up with binutils datestamp 20120301 |
khays |
4510d 06h |
/ |
| 165 |
fixed issues with PC relative fixups in the linker |
khays |
4511d 13h |
/ |
| 164 |
Modified the data path to allow the bus to go idle while waiting for an interrupt. This makes it easier to debug code that uses the WAI instruction, as both Wr_Enable and Rd_Enable go low. |
jshamlet |
4582d 00h |
/ |
| 163 |
sync with binutils 2.22.51.20111114 |
khays |
4619d 12h |
/ |
| 162 |
Added optional generic to specify that the BRK instruction implements a WAit_for_Interrupt (WAI) instruction instead. Logically emulates INT, but without triggering a soft interrupt. Note that the NOP instruction maps to BRK, and will not function correctly if this option is set. |
jshamlet |
4672d 17h |
/ |
| 161 |
synchronize binutils/ with gnu dev tree of 2.21.53.20110828 |
khays |
4696d 12h |
/ |
| 160 |
synchronize binutils/gas with gnu dev tree of 2.21.53.20110828 |
khays |
4696d 12h |
/ |
| 159 |
synchronize binutils/gold with gnu dev tree of 2.21.53.20110828 |
khays |
4696d 12h |
/ |
| 158 |
synchronize binutils/opcodes with gnu dev tree of 2.21.53.20110828 |
khays |
4696d 12h |
/ |
| 157 |
synchronize binutils/ld with gnu dev tree of 2.21.53.20110828 |
khays |
4696d 12h |
/ |
| 156 |
Optimized for timing,
Flattened block structure to single entity. |
jshamlet |
4729d 08h |
/ |
| 155 |
Fixed additional interrupt logic bug,
Optimized several blocks - including ALU, stack, program counter, and data path. |
jshamlet |
4730d 03h |
/ |
| 154 |
Fixed problem with missing data path override in interrupt logic. Should resolve issues with processor crashing when an interrupt occurs as a STO instruction is being executed. |
jshamlet |
4735d 06h |
/ |
| 153 |
Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded,
Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered. |
jshamlet |
4762d 01h |
/ |
| 152 |
Correct the descriptions for GMSK and SMSK instructions in the Open8 Assembly Language Reference |
khays |
4770d 04h |
/ |
| 151 |
Fixed STO instruction and interrupt logic to avoid address bus corruption issues. |
jshamlet |
4772d 04h |
/ |
| 150 |
Updated the assembly language reference to add the CLR pseudo-mnemonic |
khays |
4772d 12h |
/ |
| 149 |
added clr "Clear Accumulator" pseudo-instruction |
khays |
4772d 14h |
/ |
