Rev |
Log message |
Author |
Age |
Path |
169 |
Corrected issue with CMP and SBC generating an inverted carry flag and added new constants to the package file to simplify interfacing new modules. |
jshamlet |
3207d 19h |
/ |
168 |
Simplified write data path logic,
Converted RTC to packed BCD,
Corrected several bugs in real time clock component, |
jshamlet |
3986d 15h |
/ |
167 |
Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow.
Added several useful modules that use the Open8 bus. |
jshamlet |
3994d 13h |
/ |
166 |
fixed additional issues with range checking on PCREL relocations for open8, added test cases to verify, catch tree up with binutils datestamp 20120301 |
khays |
4558d 14h |
/ |
165 |
fixed issues with PC relative fixups in the linker |
khays |
4559d 21h |
/ |
164 |
Modified the data path to allow the bus to go idle while waiting for an interrupt. This makes it easier to debug code that uses the WAI instruction, as both Wr_Enable and Rd_Enable go low. |
jshamlet |
4630d 09h |
/ |
163 |
sync with binutils 2.22.51.20111114 |
khays |
4667d 21h |
/ |
162 |
Added optional generic to specify that the BRK instruction implements a WAit_for_Interrupt (WAI) instruction instead. Logically emulates INT, but without triggering a soft interrupt. Note that the NOP instruction maps to BRK, and will not function correctly if this option is set. |
jshamlet |
4721d 02h |
/ |
161 |
synchronize binutils/ with gnu dev tree of 2.21.53.20110828 |
khays |
4744d 20h |
/ |
160 |
synchronize binutils/gas with gnu dev tree of 2.21.53.20110828 |
khays |
4744d 20h |
/ |
159 |
synchronize binutils/gold with gnu dev tree of 2.21.53.20110828 |
khays |
4744d 20h |
/ |
158 |
synchronize binutils/opcodes with gnu dev tree of 2.21.53.20110828 |
khays |
4744d 20h |
/ |
157 |
synchronize binutils/ld with gnu dev tree of 2.21.53.20110828 |
khays |
4744d 20h |
/ |
156 |
Optimized for timing,
Flattened block structure to single entity. |
jshamlet |
4777d 16h |
/ |
155 |
Fixed additional interrupt logic bug,
Optimized several blocks - including ALU, stack, program counter, and data path. |
jshamlet |
4778d 11h |
/ |
154 |
Fixed problem with missing data path override in interrupt logic. Should resolve issues with processor crashing when an interrupt occurs as a STO instruction is being executed. |
jshamlet |
4783d 14h |
/ |
153 |
Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded,
Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered. |
jshamlet |
4810d 10h |
/ |
152 |
Correct the descriptions for GMSK and SMSK instructions in the Open8 Assembly Language Reference |
khays |
4818d 12h |
/ |
151 |
Fixed STO instruction and interrupt logic to avoid address bus corruption issues. |
jshamlet |
4820d 13h |
/ |
150 |
Updated the assembly language reference to add the CLR pseudo-mnemonic |
khays |
4820d 20h |
/ |