URL https://opencores.org/ocsvn/open_hitter/open_hitter/trunk

Subversion Repositories open_hitter

[/] - Rev 10

Rev	Log message	Author	Age	Path
10	split source files to sime and rtl	stvhawes	3495d 14h	/
9	highlevel block diagram added	stvhawes	3496d 11h	/
8	sim sequence error fixed, so 20% success -> 100% success for unit test on fpga	stvhawes	3496d 13h	/
7	split clock/byte_ready and fix logic	stvhawes	3501d 07h	/
6	fixing synthesizable	stvhawes	3502d 15h	/
5	fixing synthesizable	stvhawes	3502d 20h	/
4	developing ideas around unit test / fpga verification	stvhawes	3503d 08h	/
3	developing ideas around unit test / fpga verification	stvhawes	3503d 08h	/
2	initial sources, wrappers for regression test harness	stvhawes	3514d 10h	/
1	The project and the structure was created	root	3516d 05h	/