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Rev Log message Author Age Path
18 search_control is up for simulation (ghdl) stvhawes 3461d 19h /
17 persistent bug: search_control_wrapper.vhd:230:21:@36us:(assertion error): search_control_wrapper: test: 3 bad id stvhawes 3467d 05h /
16 minor fixes to search_control test bench stvhawes 3473d 16h /
15 adding in search_control and testbench stvhawes 3474d 20h /
14 search_item_wrapper bench debugged stvhawes 3480d 17h /
13 test bench for search_item stvhawes 3483d 21h /
12 wrapper test for search_item stvhawes 3489d 07h /
11 multiplex searh item added stvhawes 3489d 23h /
10 split source files to sime and rtl stvhawes 3503d 22h /
9 highlevel block diagram added stvhawes 3504d 19h /
8 sim sequence error fixed, so 20% success -> 100% success for unit test on fpga stvhawes 3504d 21h /
7 split clock/byte_ready and fix logic stvhawes 3509d 15h /
6 fixing synthesizable stvhawes 3510d 23h /
5 fixing synthesizable stvhawes 3511d 04h /
4 developing ideas around unit test / fpga verification stvhawes 3511d 16h /
3 developing ideas around unit test / fpga verification stvhawes 3511d 16h /
2 initial sources, wrappers for regression test harness stvhawes 3522d 18h /
1 The project and the structure was created root 3524d 13h /

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