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Rev Log message Author Age Path
140 Update ChangeLog olivier.girard 4428d 19h /
139 Add some SVN ignore patterns olivier.girard 4429d 04h /
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4429d 04h /
137 Update ChangeLog olivier.girard 4460d 18h /
136 Update all FPGA projects with the latest core version. olivier.girard 4460d 18h /
135 Update documentation to reflect the ASIC implementation options. olivier.girard 4460d 18h /
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 4460d 19h /
133 Add support for new CPU version. olivier.girard 4460d 19h /
132 Update FPGA examples with the POP.B bug fix olivier.girard 4473d 18h /
131 Update ChangeLog olivier.girard 4481d 17h /
130 Fixed POP.B bug (see Bugtracker http://opencores.org/bug,assign,2137 ) olivier.girard 4481d 17h /
129 Update ChangeLog olivier.girard 4557d 18h /
128 Fixed CALL x(SR) bug (see Bugtracker http://opencores.org/bug,view,2111 ) olivier.girard 4557d 18h /
127 update changelog... olivier.girard 4593d 17h /
126 Remove freewrap642 directory.
Tools users now have to install TCL/TK instead.
olivier.girard 4593d 17h /
125 update changelog... olivier.girard 4607d 21h /
124 Improved gdbproxy robustness.
Create a workaround to prevent GDB from freezing when single-stepping on a LPMx or a "JMP $-0" instruction.
olivier.girard 4608d 08h /
123 update changelog... olivier.girard 4629d 19h /
122 Add coverage report generation (NCVERILOG only)
Add support for the ISIM Xilinx simulator.
olivier.girard 4629d 19h /
121 Add a new FPGA example for the LX9 Microboard from Avnet.
Many thanks to Ricardo Ribalda Delgado for his contribution on this one :-)
olivier.girard 4701d 19h /

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