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Rev Log message Author Age Path
182 Minor update to reflect new ASIC_CLOCKING option. olivier.girard 4291d 01h /
181 Update with latest oMSP Core version. olivier.girard 4291d 01h /
180 Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-)
olivier.girard 4291d 01h /
179 Update all linker scripts with a simplified version.
Thanks to Mihai M. for this one :-)
olivier.girard 4300d 01h /
178 Update all linker scripts with a simplified version.
Thanks to Mihai M. for this one :-)
olivier.girard 4300d 01h /
177 Update ChangeLog olivier.girard 4317d 01h /
176 Update FPGA projects with latest openMSP430 core RTL olivier.girard 4317d 01h /
175 Update hardware breakpoint unit with the followings:
- fixed hardware breakpoint bug with CALL instructions.
- modified data read watchpoint behavior to also trigger with read/modify/write instructions.
- removed unused ports.
olivier.girard 4317d 01h /
174 Cleanup dmem_wr generation logic. Important note: this is not a bug fix, only beautification. olivier.girard 4317d 01h /
173 Update ChangeLog olivier.girard 4350d 23h /
172 GDB-Proxy now supports multi-core systems as well as hardware and software memory breakpoints.
It is to be noted that in a multi-core environment, software breakpoints can be configured for shared or dedicated program memory topologies.
olivier.girard 4350d 23h /
171 Update in order to add Hardware breakpoint support.
Hardware breakpoint are here only added for development purpose in order to add multi-core features as well as software & hardware breakpoint support to the GDB-Proxy.
olivier.girard 4350d 23h /
170 Update ChangeLog olivier.girard 4372d 01h /
169 Update the Mini-debugger with multi-core support.
Up to quad core systems are now supported by the GUI.
olivier.girard 4372d 01h /
168 Add missing second oMSP system. olivier.girard 4372d 01h /
167 Update LX9 Microboard FPGA example.
It now includes a dual-core oMSP system with a shared 16kB program memory.
Each core has its own 2kB data memory and an additional 2kB shared data memory.
olivier.girard 4372d 01h /
166 Update documentation with new I2C based serial debug interface olivier.girard 4381d 00h /
165 Add missing I2C address in the README file. olivier.girard 4386d 02h /
164 Update ChangeLog olivier.girard 4413d 01h /
163 Fixed font handling problem olivier.girard 4413d 01h /

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