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34 To avoid potential conflicts with other Verilog modules in bigger projects, the openMSP430 sub-modules have all been renamed with the "omsp_" prefix. olivier.girard 5423d 06h /
33 In order to avoid confusion, the following changes have been implemented to the Verilog code:
- renamed the "rom_*" ports and defines to "pmem_*" (program memory).
- renamed the "ram_*" ports and defines to "dmem_*" (data memory).

In addition, in order to prevent potential conflicts with the Verilog defines of other IPs, a Verilog undefine file has been created.
olivier.girard 5423d 07h /
32 Minor update to the HTML documentation + add some SVN ignore properties to the Altera FPGA project simulation directory. olivier.girard 5425d 03h /
31 Update documentation (new Altera FPGA project + diverse minor updates) olivier.girard 5425d 04h /
30 Add Altera Cyclone II FPGA project example (thanks to Vadim Akimov contribution). olivier.girard 5425d 04h /
29 Add Altera Cyclone II FPGA project example. olivier.girard 5425d 05h /
28 renamed "diligent_s3board" directory to "xilinx_diligent_s3board" olivier.girard 5433d 13h /
27 renamed "diligent_s3board" directory to "xilinx_diligent_s3board" olivier.girard 5433d 13h /
26 Xilinx implementation example:
- update the project directory structure.
- make a local copy of the openMSP430 core to make the project self contained.
olivier.girard 5433d 13h /
25 FPGA Setup: Created some BAT files for WINDOWS users. olivier.girard 5523d 11h /
24 FPGA Setup: Created some BAT files for WINDOWS users. olivier.girard 5523d 11h /
23 Renamed the "openMSP430.inc" file to "openMSP430_defines.v" & added the "timescale.v" file.
In order to follow the same structure as other OpenCores projects, the timescale and the defines are now included from within the Verilog files (using the `include construct).
olivier.girard 5544d 09h /
22 Updated some links in the HTML documentation. olivier.girard 5557d 06h /
21 added discussion group info olivier.girard 5569d 07h /
20 added some SVN ignore patterns.
small update to html documentation
olivier.girard 5570d 03h /
19 added SVN property for keywords olivier.girard 5570d 04h /
18 Updated headers with SVN info olivier.girard 5570d 04h /
17 Updated header with SVN info olivier.girard 5570d 04h /
16 Updated header with SVN info olivier.girard 5570d 04h /
15 Updated headers with SVN info olivier.girard 5570d 05h /

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