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Subversion Repositories openrisc

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Rev	Log message	Author	Age	Path
79	Fixed retry loop in or_debug_proxy, hopefully more stable when physically resetting the board	julius	5343d 04h	/
78	Fixed typo in Silos workaround script	rherveille	5343d 23h	/
77	Added support for Silvaco's Silos simulator Added workaround for Silos's exit code behaviour	rherveille	5343d 23h	/
76	Added: +libext+.v Added: +incdir+.	rherveille	5344d 23h	/
75	Fixed toolchain script's cygwin ncurses check	julius	5350d 01h	/
74	Toolchain script fix for ncurses header checking	julius	5368d 04h	/
73	toolchain script error fix	julius	5368d 05h	/
72	Toolchain install script: or1ksim location changed, few tweaks	julius	5371d 02h	/
71	ORPSoC board builds, adding readmes	julius	5387d 08h	/
70	ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\!	julius	5391d 13h	/
69	ORPSoC xilinx ml501 board update - added ethernet eupport and software test	julius	5391d 14h	/
68	Fixed up a couple of Makefile things in ORPSoCv2	julius	5394d 06h	/
67	New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory	julius	5394d 08h	/
66	Fixed the simulator-assisted printf l.nop in cycle accurate, and supporting software.	julius	5414d 07h	/
65	ORPSoCv2 update: or1200_defines DVRDCR value, verilog testbench uart decoder fix	julius	5418d 13h	/
64	Trying to fix the system c model jtagsc.h checkout problem, also removed dependency generation in the system c modules makefile.	julius	5421d 08h	/
63	Finally adding RSP server to cycle accurate model, based on work by Jeremey Bennett but slightly modified for the debug unit we use. Adding binary logging file mode to cycle accurate model which allows smaller and quicker execution logging, along with binary log reader in sw/utils. Adding cycle accurate wishbone bus transaction log generation. still some bugs in CA model for some reason where it skips cycles when logging either execution or bus transactions. Changing or1200 du allowing hardware watchpoints on data load and stores.	julius	5431d 05h	/
62	This material is part of the separate website downloads directory.	jeremybennett	5442d 08h	/
61	The build directory should not be part of the SVN configuration.	jeremybennett	5442d 08h	/
60	Mark Jarvin's patches to support Mac OS X (Snow Leopard).	jeremybennett	5449d 02h	/

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Subversion Repositories openrisc

[/] - Rev 79

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