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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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635 Patch for http://bugzilla.opencores.org/show_bug.cgi?id=69.

* config/or32/linux-elf.h <TARGET_OS_CPP_BUILTINS>: Defined, based
on LINUX_TARGET_OS_CPP_BUILTINS copied from linux.h.		 jeremybennett 4840d 12h /
634 orpsoc: atlys: autoregenerate coregen cores

Instead of keeping binary .ngc files of the coregen
generated cores, use coregen to generate them from the .xco
and .cgp file		 stekern 4841d 19h /
633 orpsoc: add Digilent Atlys spartan6 board README

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4841d 19h /
632 orpsoc: add Digilent Atlys spartan6 board sw include file

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4841d 19h /
631 orpsoc: add Digilent Atlys spartan6 board testbench

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4841d 19h /
630 orpsoc: add Digilent Atlys spartan6 board backend

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4841d 19h /
629 orpsoc: add Digilent Atlys spartan6 board or1ksim configuration

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4841d 19h /
628 orpsoc: add Digilent Atlys spartan6 board Makefiles

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4841d 19h /
627 orpsoc: add Digilent Atlys spartan6 board rtl

Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>		 stekern 4841d 19h /
626 Fix to support GCC 4.6 by disabling -Werror. jeremybennett 4850d 10h /
625 Fixed configuration to work with GCC 4.6, added -Werror to avoid GCC 4.6 warning as a temporary fix. Added pic.cfg to EXTRA_DIST. Made tests build with SILENT_RULES if available. jeremybennett 4850d 11h /
624 add missing delay slot instruction
vPortDisableInterrupts
vPortEnableInterrupts		 filepang 4851d 15h /
623 cleanup source code
Demo/OpenRISC_SIM_GCC/arch/support.h
Demo/OpenRISC_SIM_GCC/arch/interrupts.h
Demo/OpenRISC_SIM_GCC/arch/link.ld

add gpio driver

add gpio base address definition		 filepang 4852d 07h /
622 update uart driver for support multiple uart cores
from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart		 filepang 4852d 09h /
621 update sim.cfg for newer version of Or1ksim.
remove unused files.
cleanup source code.

insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will
be returned by xPortEndScheduler().		 filepang 4854d 01h /
620 remove unused file
cleanup makefile
update uart_init(), disable interrupt before initialize.		 jeremybennett 4854d 14h /
619 ORPSoC OR1200 fix and regression test for bug 51.

signed-off Julius Baxter
reviewed by Stefan Kristiansson		 julius 4863d 02h /
618 Remove unused parameter Tp olof 4863d 09h /
617 Set tx_negedge correctly (Fixes bug #12) olof 4867d 12h /
616 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4868d 10h /

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