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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

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Rev Log message Author Age Path
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5263d 04h /
68 Fixed up a couple of Makefile things in ORPSoCv2 julius 5265d 20h /
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5265d 23h /
66 Fixed the simulator-assisted printf l.nop in cycle accurate, and supporting software. julius 5285d 21h /
65 ORPSoCv2 update: or1200_defines DVRDCR value, verilog testbench uart decoder fix julius 5290d 03h /
64 Trying to fix the system c model jtagsc.h checkout problem, also removed dependency generation in the system c modules makefile. julius 5292d 22h /
63 Finally adding RSP server to cycle accurate model, based on work by Jeremey Bennett but slightly modified for the debug unit we use. Adding binary logging file mode to cycle accurate model which allows smaller and quicker execution logging, along with binary log reader in sw/utils. Adding cycle accurate wishbone bus transaction log generation. still some bugs in CA model for some reason where it skips cycles when logging either execution or bus transactions. Changing or1200 du allowing hardware watchpoints on data load and stores. julius 5302d 19h /
62 This material is part of the separate website downloads directory. jeremybennett 5313d 22h /
61 The build directory should not be part of the SVN configuration. jeremybennett 5313d 23h /
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5320d 16h /
59 Toolchain install script gcc patch change and gdb configure change julius 5341d 16h /
58 ORPSoC2 update - added fpu and implemented in processor, also some sw tests for it, makefile for event sims cleaned up julius 5344d 15h /
57 ORPSoC execution logs created by event sim and cycle accurate should now be equivalent. Changed some of the rule names in orpsoc main makefile to make all rules use hyphens instead of underscores between words julius 5349d 19h /
56 adding generic pll model to orpsoc julius 5357d 21h /
55 Added modelsim support to makefile. Moved buffer libraries to sensible place. Removed a lot of junk julius 5360d 11h /
54 wb_conbus wishbone arbiter now in orpsocv2 instead of synthesized netlist julius 5370d 18h /
53 Fixed incorrect commandline option for ORPSoC and main makefile setting julius 5388d 19h /
52 ORPSoC update - ability to dump part or all of SRAM contents at the end of simulation julius 5389d 15h /
51 ORPSoCv2 updates: cycle accurate profiling, ELF loading julius 5403d 17h /
50 Adding or32_funcs.S julius 5403d 22h /

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