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Rev Log message Author Age Path
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 5086d 12h /
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 5088d 14h /
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 5089d 01h /
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 5089d 09h /
451 More tidying up. jeremybennett 5093d 05h /
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 5093d 08h /
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.
julius 5095d 05h /
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 5095d 15h /
447 Updates to register order. jeremybennett 5096d 09h /
446 gdb-7.2 gdbserver updates. julius 5097d 03h /
445 gdbserver update to use kernel port ptrace register definitions. julius 5098d 00h /
444 Changes to ABI handling of varargs. jeremybennett 5098d 09h /
443 Work in progress on more efficient Ethernet. jeremybennett 5098d 13h /
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 5099d 03h /
441 Changes for gdbserver. jeremybennett 5099d 10h /
440 Updated documentation to describe new Ethernet usage. jeremybennett 5100d 04h /
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.
julius 5102d 09h /
438 Fix to newlib header and library locations. jeremybennett 5105d 09h /
437 Or1ksim - ethernet peripheral update, working much better. julius 5107d 23h /
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5108d 23h /

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