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Rev Log message Author Age Path
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 4916d 08h /
458 or1ksim testsuite updates julius 4917d 06h /
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 4925d 20h /
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 4925d 22h /
455 Updated to support threads. Does require thread debugging enabled in uClibc. jeremybennett 4930d 00h /
454 Updated to incorporate pthreads for Linux tool chain. jeremybennett 4932d 01h /
453 Updates to support constructor/destructor initialization for uClibc. jeremybennett 4932d 12h /
452 Update to define __UCLIBC__ when using the uClibc tool chain. jeremybennett 4932d 21h /
451 More tidying up. jeremybennett 4936d 16h /
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 4936d 20h /
449 ORPSoC - or1200_monitor.v additions enabling new experimental execution checks.

Replace use of "clean-all" with "distclean" as make rule to clean things.		 julius 4938d 17h /
448 Changed or32 to openrisc as Linux architecture name. jeremybennett 4939d 03h /
447 Updates to register order. jeremybennett 4939d 21h /
446 gdb-7.2 gdbserver updates. julius 4940d 15h /
445 gdbserver update to use kernel port ptrace register definitions. julius 4941d 12h /
444 Changes to ABI handling of varargs. jeremybennett 4941d 21h /
443 Work in progress on more efficient Ethernet. jeremybennett 4942d 01h /
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 4942d 15h /
441 Changes for gdbserver. jeremybennett 4942d 21h /
440 Updated documentation to describe new Ethernet usage. jeremybennett 4943d 16h /

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