OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] - Rev 475

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
475 ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. julius 5048d 18h /
474 uC/OS-II port linker flags updated. julius 5049d 00h /
473 Fix typos in tool chain build script. Add build script for BusyBox/uClibc/Linux. Delete obsolete scripts, improve board description for test, add -pthread flag to GCC for Linux. jeremybennett 5049d 18h /
472 Various changes which improve the quality of the tracing. jeremybennett 5049d 20h /
471 Adding ucos-ii port. julius 5051d 23h /
470 ORPSoC OR1200 crt0 updates. julius 5052d 18h /
469 newlib update - added zeroing of r0 to crt0.S julius 5053d 19h /
468 ORPSoC update:
Added USER_ELF and USER_VMEM options to reference design simulation scripts.
Changed use of absolute BOARD_PATH variable to simply BOARD relative to board path
ML501's board.h bootrom default now boot from SPI
julius 5053d 19h /
467 ORPmon - bug fixes and clean up. julius 5054d 17h /
466 ORPSoC updates:
Add new test to determine processor's capabilities.
Fix up typo in example in spiflash app README
julius 5054d 22h /
465 ORPSoC SPI flash load Makefile and README updates. julius 5055d 13h /
464 More ORPmon updates. julius 5055d 13h /
463 ORPmon update julius 5055d 16h /
462 ORPSoC SystemC wrapper updates, monitor output more similar to or1ksim.

RAM models updated.
julius 5055d 21h /
461 Updated to be much stricter about usage. jeremybennett 5057d 17h /
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 5057d 18h /
459 Add option to bld-all.sh to explicitly set control load of make, and fix typos. julius 5058d 00h /
458 or1ksim testsuite updates julius 5058d 22h /
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 5067d 13h /
456 ORPSoCv2 or1200 - SPRs module format and comment update. Or1200 monitor Verilog now displays report and exit l.nops to stdout by default. julius 5067d 14h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.