OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] - Rev 86

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
86 Bug 1723 fixed (PS2 keyboard error message clarification). jeremybennett 5226d 00h /
85 Bug 1773 (RSP usage with ELF image preloaded) fixed. jeremybennett 5226d 00h /
84 Remove duplicated directories. jeremybennett 5226d 01h /
83 Fix to use -1 to invalidate cache tags. Suggested by John Alfredo. jeremybennett 5226d 15h /
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5226d 16h /
81 Directory no longer used. jeremybennett 5226d 16h /
80 Add missing configuration files to SVN. jeremybennett 5226d 19h /
79 Fixed retry loop in or_debug_proxy, hopefully more stable when physically resetting the board julius 5238d 20h /
78 Fixed typo in Silos workaround script rherveille 5239d 15h /
77 Added support for Silvaco's Silos simulator
Added workaround for Silos's exit code behaviour
rherveille 5239d 16h /
76 Added: +libext+.v
Added: +incdir+.
rherveille 5240d 15h /
75 Fixed toolchain script's cygwin ncurses check julius 5245d 18h /
74 Toolchain script fix for ncurses header checking julius 5263d 20h /
73 toolchain script error fix julius 5263d 21h /
72 Toolchain install script: or1ksim location changed, few tweaks julius 5266d 18h /
71 ORPSoC board builds, adding readmes julius 5283d 01h /
70 ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\! julius 5287d 05h /
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5287d 06h /
68 Fixed up a couple of Makefile things in ORPSoCv2 julius 5289d 22h /
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5290d 01h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.