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Rev Log message Author Age Path
1000 IC/DC cache enable routines fixed. simons 7977d 23h /
999 Now every ramdisk image should have init program. simons 7978d 00h /
998 added missing fout initialization markom 7978d 02h /
997 PRINTF should be used instead of printf; command redirection repaired markom 7978d 03h /
996 some minor bugs fixed markom 7979d 01h /
995 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7979d 09h /
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7979d 09h /
993 Fixed IMMU bug. lampret 7979d 09h /
992 A bug when cache enabled and bus error comes fixed. simons 7979d 18h /
991 Different memory controller. simons 7979d 18h /
990 Test is now complete. simons 7979d 18h /
989 c++ is making problems so, for now, it is excluded. simons 7981d 02h /
988 ORP architecture supported. simons 7981d 18h /
987 ORP architecture supported. simons 7982d 01h /
986 outputs out of function are not registered anymore markom 7982d 02h /
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7982d 13h /
984 Disable SB until it is tested lampret 7982d 13h /
983 First checkin lampret 7982d 15h /
982 Moved to sim/bin lampret 7982d 15h /
981 First checkin. lampret 7982d 15h /

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