| Rev |
Log message |
Author |
Age |
Path |
| 1145 |
1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine. |
sfurman |
7901d 22h |
/ |
| 1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7904d 04h |
/ |
| 1143 |
Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. |
sfurman |
7904d 18h |
/ |
| 1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7904d 18h |
/ |
| 1141 |
WB = 1/2 RISC clock test code enabled. |
lampret |
7906d 03h |
/ |
| 1140 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. |
lampret |
7906d 03h |
/ |
| 1139 |
Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. |
lampret |
7906d 03h |
/ |
| 1138 |
Added some information how to run simulations. |
lampret |
7906d 23h |
/ |
| 1137 |
Added RFRAM generic and Altera lpm library. |
lampret |
7906d 23h |
/ |
| 1136 |
Add altera lpm library. |
lampret |
7906d 23h |
/ |
| 1135 |
Added get_gpr support for OR1200_RFRAM_GENERIC |
lampret |
7906d 23h |
/ |
| 1134 |
Changed location of debug test code to 0. |
lampret |
7906d 23h |
/ |
| 1133 |
Adding OR1200_CLMODE_1TO2 test code. |
lampret |
7906d 23h |
/ |
| 1132 |
RFRAM defines comments updated. Altera LPM option added. |
lampret |
7906d 23h |
/ |
| 1131 |
Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. |
lampret |
7906d 23h |
/ |
| 1130 |
RFRAM type always need to be defined. |
lampret |
7906d 23h |
/ |
| 1129 |
Added Altera LPM RAMs. Changed generic RAM output when OE inactive. |
lampret |
7906d 23h |
/ |
| 1128 |
Fixed my bustage: Add missing 2nd argument to open(). Otherwise,
opening a serial port channel can sporadically fail. |
sfurman |
7911d 22h |
/ |
| 1127 |
Added ability to map I/O from simulated UARTs to physical serial ports
on the host running the simulator. |
sfurman |
7914d 22h |
/ |
| 1126 |
Added lengthy comment explaining all possible choices for UART
channels, e.g. xterm, tcp, file, etc. |
sfurman |
7917d 01h |
/ |
