URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 1292

Rev	Log message	Author	Age	Path
1292	GPR0 hardwired to zero.	lampret	7480d 11h	/
1291	Changed behavior of the simulation generic models	lampret	7480d 11h	/
1290	added more operands	phoenix	7500d 06h	/
1289	Add error-checking; get through gcc -Wall; tidy Makefile	partain	7500d 15h	/
1288	By default l.cust5 insns are disabled	lampret	7510d 10h	/
1287	Added test case for l.cust5 custom instructions	lampret	7510d 10h	/
1286	Changed desciption of the l.cust5 insns	lampret	7510d 10h	/
1285	Changed desciption of the l.cust5 insns	lampret	7510d 10h	/
1284	Added some l.cust5 custom instructions as example	lampret	7510d 10h	/
1283	configuration update	phoenix	7511d 03h	/
1282	Gries Ulrich: mac address fix, use of kernel crc	phoenix	7511d 03h	/
1281	add rudimentary install target, and make program targets more make-idiomatic	partain	7514d 11h	/
1280	minor $(CC) and spelling patch from Will Partain	markom	7529d 23h	/
1279	This commit was manufactured by cvs2svn to create tag 'LINUX_2_4_26_OR32'.		7532d 07h	/
1278	OpenRISC Linux 2.4.26 initial import	phoenix	7532d 07h	/
1277	SRAM gets properly initialized	markom	7534d 22h	/
1276	OpenRISC Linux 2.4.26 initial import	phoenix	7535d 03h	/
1275	OpenRISC Linux 2.4.26 initial import	phoenix	7535d 03h	/
1274	jp2 protocol matches new dbg_interface changes	markom	7535d 17h	/
1273	Add support for 512B instruction cache.	simont	7541d 19h	/