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Rev Log message Author Age Path
1630 *** empty log message *** jcastillo 6781d 16h /
1629 First Import of uClinux for RC20x board jcastillo 6781d 16h /
1628 First Import of uClinux for RC20x board jcastillo 6781d 17h /
1627 First Import of RC20x uClinux jcastillo 6781d 17h /
1626 First Import of uClinux for RC20x board jcastillo 6781d 17h /
1625 First Import of uClinux for RC20x board jcastillo 6781d 17h /
1624 First Import of uClinux for RC20x board jcastillo 6781d 17h /
1623 First Import of uClinux for RC20x board jcastillo 6781d 17h /
1622 First Import of uClinux for RC20x board jcastillo 6781d 17h /
1621 First Impot jcastillo 6781d 18h /
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6786d 14h /
1619 Fixed types in function declaration jcastillo 6786d 19h /
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6787d 02h /
1617 *** empty log message *** phoenix 6787d 02h /
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6787d 02h /
1615 *** empty log message *** phoenix 6787d 02h /
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6797d 03h /
1613 change default phoenix 6802d 12h /
1612 major optimizations for or32 target phoenix 6802d 13h /
1611 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'. 6805d 14h /

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