OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 213

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
213 Added test5 for DMA erez 8456d 13h /
212 Added DMA erez 8456d 13h /
211 Added check for "long long" erez 8456d 13h /
210 Updated debug. More cleanup. Added MAC. lampret 8459d 19h /
209 Update debug. lampret 8462d 00h /
208 Initial checkin with working port to or1k chris 8463d 11h /
207 Several major changes to allow gdb to work with an Or1k implementation
that does not need a writeable PC. This version will use the breakpoint
vector and install a new vector into the EPC register, and then single
step out of the breakpoint exception. The breakpoint exception vector
must include only 2 commands: l.rfe and l.nop. Anything else and this
gdb version will fail w/ or1ksim.
chris 8463d 15h /
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.
chris 8463d 15h /
205 Adding debug capabilities. Half done. lampret 8467d 19h /
204 Added function prototypes to stop gcc from complaining erez 8470d 10h /
203 Updated from xess branch. lampret 8472d 00h /
202 changed configure.in and acconfig.h to check for long long
reran autoheader & autoconf
erez 8477d 07h /
201 readfunc() and writefunc() now use unsigned long values instead of unsigned char. erez 8477d 07h /
200 Initial import simons 8480d 14h /
199 Initial import simons 8480d 16h /
198 Moved from testbench.old simons 8483d 03h /
197 This is not used any more. simons 8483d 03h /
196 Configuration SPRs added. simons 8483d 03h /
195 New test added. simons 8483d 03h /
194 Fixed a bug for little endian architectures. Could cause a hang of
gdb under some circumstances.
chris 8483d 11h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.