URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 344

Rev	Log message	Author	Age	Path
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8258d 03h	/
343	Small touches to test programs	erez	8258d 05h	/
342	added exception vectors to support and modified section names	markom	8259d 02h	/
341	added VAPI for uart; uart 16550 support, some bugs fixed	markom	8259d 04h	/
340	Added hpint vector	lampret	8259d 05h	/
339	Added setpc test	lampret	8259d 05h	/
338	Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc)	lampret	8259d 05h	/
337	Fixed tick timer interrupt reporting by using TTCR[IP] bit.	lampret	8259d 05h	/
336	VAPI works	markom	8260d 00h	/
335	some small bugs fixed	markom	8260d 01h	/
334	removed vapi client file	markom	8260d 04h	/
333	small bug fixed	markom	8260d 07h	/
332	removed fixed irq numbering from pic.h; tick timer section added	markom	8260d 07h	/
331	dependecy is required by history analisis	markom	8260d 08h	/
330	Cache test	lampret	8260d 11h	/
329	Now using macros from spr_defs.h	lampret	8260d 11h	/
328	Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports.	lampret	8260d 13h	/
327	simulate_dc_mmu_load() was calling insn cache/mmu routines instead of data cache/mmu. Fixed.	lampret	8260d 13h	/
326	More realistic default cache type.	lampret	8260d 13h	/
325	minor ethernet testbench modifications	erez	8261d 16h	/