OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 371

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
371 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c markom 8399d 19h /
370 Program counter divided to PPC and NPC. simons 8402d 08h /
369 Configuration command description added. simons 8402d 20h /
368 Typos. lampret 8402d 20h /
367 Changed DSR/DRR behavior and exception detection. lampret 8402d 21h /
366 *** empty log message *** simons 8403d 10h /
365 Added wb_cyc_o assignment after it was removed by accident. lampret 8403d 16h /
364 info spr bug fixed markom 8404d 14h /
363 program can be stepped and continued before running it, supporting low level debugging markom 8404d 15h /
362 some changes based on current modifications to or1k; cleaner register naming; ctrl-c causes stepi; write&read pc work on next instruction markom 8404d 20h /
361 set config command added; config struct has been divided into two structs - config and runtime; -f option allows multiple config scripts markom 8404d 21h /
360 Added OR1200_REGISTERED_INPUTS. lampret 8405d 08h /
359 Added optional sampling of inputs. lampret 8405d 08h /
358 Fixed virtual silicon single-port rams instantiation. lampret 8405d 08h /
357 Fixed dbg_is_o assignment width. lampret 8405d 08h /
356 Break point bug fixed simons 8405d 11h /
355 uart VAPI model improved; changes to MC and eth. markom 8405d 18h /
354 Fixed width of du_except. lampret 8406d 04h /
353 Cashes disabled. simons 8406d 15h /
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8407d 18h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.