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Rev Log message Author Age Path
389 Changed default delay for load and store in superscalar cpu. lampret 8263d 13h /
388 Added comments for cpu section. lampret 8263d 13h /
387 Now FPGA and ASIC target are separate. lampret 8263d 14h /
386 Fixed VS RAM instantiation - again. lampret 8263d 14h /
385 check testbench now modified to work with new report output markom 8263d 20h /
384 modified simmem.cfg structure! ADD > BEFORE EACH LINE! markom 8263d 22h /
383 modified simmem.cfg structure! ADD markom 8263d 22h /
382 bitmask function bug fixed markom 8263d 23h /
381 number display is more strict with 0x prefix with hex numbers markom 8263d 23h /
380 all tests pass check markom 8264d 00h /
379 bug fixed. markom 8264d 01h /
378 cleanup in testbench; pc divided into ppc and npc markom 8264d 01h /
377 cleanup in testbench; pc divided into ppc and npc markom 8264d 01h /
376 int.c and int.h are general enough and should be useful for other tests beside uos markom 8264d 02h /
375 Support for breakpoints changed. simons 8264d 12h /
374 *** empty log message *** simons 8264d 17h /
373 update after links markom 8264d 22h /
372 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; added opcodes/or32.c; more detailed gdb l.trap handling markom 8265d 00h /
371 steps toward joining or32.c and opcode/or32.h of or1ksim and gdb; decode.c moved to or32.c markom 8265d 00h /
370 Program counter divided to PPC and NPC. simons 8267d 12h /

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