OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 496

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
496 Added generation of instruction set reference document. ivang 8218d 20h /
495 added missing enddevice command in GPIO section markom 8218d 21h /
494 trace.h removed; removed absolete trace_fd code - use exe_log instead markom 8218d 21h /
493 --enable-opt switch added to testbench configure markom 8219d 00h /
492 uart THRE interrupt immedialty after write to IER markom 8219d 00h /
491 pc command fixed markom 8219d 20h /
490 clkcycle parsing problem fixed markom 8219d 20h /
489 blank page at beginning and at the end of the isa doc. markom 8219d 20h /
488 *** empty log message *** ivang 8220d 01h /
487 Lectored english descriptions by Bob Gardner-Medwin. Thanks Bob! markom 8220d 01h /
486 Updated documentation in default sim.cfg erez 8220d 01h /
485 gdb.h moved to debug dir; except.ld renamed to default.ld markom 8220d 03h /
484 Changed to support execution from various addresses. simons 8220d 15h /
483 Implemented some GPIO tests erez 8220d 16h /
482 profiling uses l.jr instead of obsolete l.jalr markom 8220d 19h /
481 -f bug fixed markom 8220d 19h /
480 RTL_SIM define added for shorter simulation runtime. simons 8220d 20h /
479 connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed markom 8220d 20h /
478 Started adding acv_gpio testbench erez 8220d 20h /
477 Improved multi-id vapi logs (i.e. GPIO) erez 8220d 20h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.