OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 71

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
71 Clean two typos. lampret 8626d 07h /
70 Basic setjmp/longjmp are ready. lampret 8626d 07h /
69 Sim debug. lampret 8628d 05h /
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8628d 05h /
67 Added simulator "application load". lampret 8628d 05h /
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8628d 05h /
65 Added DMMU stats. lampret 8628d 05h /
64 SPR bit definition moved to spr_defs.h. lampret 8628d 05h /
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8628d 05h /
62 OR1K DMMU model. lampret 8628d 05h /
61 2000-09-26 Joel Sherrill <joel@OARcorp.com>

* libc/sys/rtems/include/pthread.h: Added file missed by earlier
commit of RTEMS modifications.		 joel 8642d 23h /
60 Memory model changed. lampret 8663d 08h /
59 2000-09-05 Joel Sherrill <joel@OARcorp.com>

* Merged newlib-1.8.2-rtems-20000905.diff which includes
or16 and or32 configuration support.		 joel 8663d 19h /
58 This commit was manufactured by cvs2svn to create tag 'newlib-1-8-2'. 8669d 17h /
57 This commit was generated by cvs2svn to compensate for changes in r56, which
included commits to RCS files with non-trunk default branches.		 joel 8669d 17h /
56 2000-08-30 Joel Sherrill <joel@OARcorp.com>

* Base import of unmodified newlib 1.8.2.		 joel 8669d 17h /
55 Added 'dv' command for dumping memory as verilog model. lampret 8679d 05h /
54 Regular maintenance. lampret 8679d 05h /
53 Added setjmp/longjmp. lampret 8684d 05h /
52 Comment character changed. lampret 8740d 01h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.