OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 710

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
710 _print removed. simons 8190d 18h /
709 eval_operands is now being generated markom 8190d 20h /
708 Sash can be now built with or32-uclibc tool chain. simons 8191d 07h /
707 _start label is now the entry point. simons 8191d 07h /
706 insn_decode execution part replaced by generated function decode_execute; use --enable-simple to use runtime decoding markom 8191d 13h /
705 Updated changed registers. ivang 8192d 14h /
704 exe_logs now print also l.nop 3 printfs markom 8192d 15h /
703 small optimizations to dissasemble markom 8192d 17h /
702 Initial coding of ethernet simulator model finished. ivang 8192d 18h /
701 Memory allocation for sections changed. simons 8193d 19h /
700 vfork reapaired again. simons 8194d 04h /
699 Simprintf bug fixed again. simons 8197d 06h /
698 Simprintf bug fixed again. simons 8197d 07h /
697 Simprintf bug fixed again. simons 8197d 07h /
696 Development version of ethernet.c ivang 8199d 14h /
695 Modifications and additions for finished ethernet core. ivang 8199d 14h /
694 immediate stats added markom 8199d 18h /
693 exception info is outputted only in verbose mode markom 8199d 19h /
692 stats data is now initialized; should fix some problems with caches, etc markom 8199d 19h /
691 some more file sanity checking markom 8199d 19h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.