URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] - Rev 785

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Rev	Log message	Author	Age	Path
785	Added XSV specific documentation.	lampret	8240d 21h	/
784	Added soem missing files.	lampret	8240d 21h	/
783	Added sim directory and sub files/dirs.	lampret	8240d 21h	/
782	Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory.	lampret	8240d 21h	/
781	Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well.	lampret	8240d 22h	/
780	Added libraries.	lampret	8240d 22h	/
779	Added bench directory	lampret	8240d 22h	/
778	Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs.	lampret	8240d 23h	/
777	Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2	lampret	8240d 23h	/
776	Updated defines.	lampret	8240d 23h	/
775	Optimized cache controller FSM.	lampret	8240d 23h	/
774	Removed old files.	lampret	8240d 23h	/
773	Changing directory structure ...	lampret	8241d 00h	/
772	Changing directory structure ...	lampret	8241d 00h	/
771	Added Makefile that is used to convert linux binary to loadable file for XSV board	lampret	8242d 00h	/
770	Maze application added. Mouse driver changed.	simons	8242d 17h	/
769	This commit was manufactured by cvs2svn to create tag 'first'.		8242d 21h	/
768	This commit was generated by cvs2svn to compensate for changes in r767, which included commits to RCS files with non-trunk default branches.	lampret	8242d 21h	/
767	First import of the XSV CPLD environment.	lampret	8242d 21h	/
766	Color bits position changed.	simons	8243d 02h	/

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[/] - Rev 785

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