URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 1023

Rev	Log message	Author	Age	Path
1023	Now most of the configuration registers are updatded automatically based on defines in or1200_defines.v.	lampret	8074d 18h	/
1022	As per Taylor Su suggestion all case blocks are full case by default and optionally (OR1200_CASE_DEFAULT) can be disabled to increase clock frequncy.	lampret	8074d 20h	/
1021	* empty log message *	rherveille	8078d 23h	/
1020	Fixed several bugs Working version, tested on Bender hardware	rherveille	8078d 23h	/
1019	fixed some bugs detected by Bender hardware	rherveille	8078d 23h	/
1018	TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2)	simons	8079d 06h	/
1017	TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2)	simons	8079d 06h	/
1016	64 bytes is the smallest packet size.	simons	8079d 23h	/
1015	Host type was not recognized.	simons	8080d 08h	/
1014	added _JBLEN definition for or1k	ivang	8080d 22h	/
1013	ORP architecture supported.	simons	8081d 00h	/
1012	This commit was manufactured by cvs2svn to create tag 'rel_4'.		8081d 17h	/
1011	Removed some commented RTL. Fixed SR/ESR flag bug.	lampret	8081d 17h	/
1010	Import	ivang	8085d 20h	/
1009	Import	ivang	8085d 21h	/
1008	Import	ivang	8085d 21h	/
1007	Import	ivang	8085d 21h	/
1006	Import	ivang	8085d 21h	/
1005	Import	ivang	8085d 21h	/
1004	Now every ramdisk image should have init program.	simons	8086d 06h	/