URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 1188

Rev	Log message	Author	Age	Path
1188	Added support for rams with byte write access.	simons	7647d 18h	/
1187	This commit was manufactured by cvs2svn to create tag 'rel_12'.		7648d 17h	/
1186	Added support for rams with byte write access.	simons	7648d 17h	/
1185	This commit was manufactured by cvs2svn to create tag 'rel_11'.		7655d 10h	/
1184	Scan signals mess fixed.	simons	7655d 10h	/
1183	OpenRISC port of gdb-5.3 straightforwardly derived from gdb-5.0	sfurman	7660d 02h	/
1182	This commit was manufactured by cvs2svn to create tag 'VER_5_3'.		7660d 04h	/
1181	Initial import of unmodified gdb-5.3 source on vendor branch	sfurman	7660d 04h	/
1180	This commit was manufactured by cvs2svn to create tag 'rel_10'.		7663d 13h	/
1179	BIST interface added for Artisan memory instances.	simons	7663d 13h	/
1178	avoid another immu exception that should not happen	phoenix	7693d 01h	/
1177	more informative output	phoenix	7694d 07h	/
1176	Added comments.	damonb	7694d 23h	/
1175	Added three missing wire declarations. No functional changes.	lampret	7695d 02h	/
1174	fix for immu exceptions that never should have happened	phoenix	7696d 03h	/
1173	Added QMEM.	lampret	7697d 11h	/
1172	Added embedded memory QMEM.	lampret	7697d 11h	/
1171	Added embedded memory QMEM.	lampret	7697d 11h	/
1170	Added support for l.addc instruction.	csanchez	7704d 07h	/
1169	Added support for l.addc instruction.	csanchez	7704d 07h	/