OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 1535

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1535 This commit was manufactured by cvs2svn to create tag 'release'. 7007d 22h /
1534 Import of Glibc robertmh 7007d 22h /
1533 Add missing newline at EOF robertmh 7008d 20h /
1532 Add pretty spr dumping code nogj 7010d 00h /
1531 Remove non-trigerable out-of-range checks nogj 7010d 00h /
1530 Move the checking of the debug channel into the TRACE() macro nogj 7010d 00h /
1529 * The effective address as written to the I/DCBPR registers needs to be translated by the respective mmu.
* Don't treat any values as special in the handling of DCPBR, DCBFR, DCBIR, ICBPR and ICBIR.
nogj 7011d 02h /
1528 s/HAS_ISBLANK/HAVE_ISBLANK/ fix compileing on windows/cygwin. Reported by Kuoping Hsu and Girish Venkatar nogj 7011d 09h /
1527 Fix the execution log when an mtspr instruction causes an itlb miss nogj 7011d 09h /
1526 Fix a very outdated comment nogj 7011d 09h /
1525 Rename ADDR_PAGE to IADDR_PAGE nogj 7011d 09h /
1524 Check OR32_IF_DELAY instead of it_jump || it_branch nogj 7011d 09h /
1523 Bring config files up-to-date with recent changes nogj 7011d 09h /
1522 Add the cycles debug channel to print the value of the cycle counter before each line nogj 7011d 09h /
1521 Add {TRACE,ERR,FIXME,WARN}_ON macros to get the state of the given debug channel nogj 7011d 09h /
1520 Remove unused code nogj 7011d 09h /
1519 Add a usefull trace to the mc nogj 7011d 09h /
1518 Print a '\n' at the end of the trace nogj 7011d 09h /
1517 Use uint8_t instead of char nogj 7011d 09h /
1516 Make non-writeable memory writeable by the debug core nogj 7011d 09h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.