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Rev Log message Author Age Path
1625 First Import of uClinux for RC20x board jcastillo 6780d 23h /
1624 First Import of uClinux for RC20x board jcastillo 6781d 00h /
1623 First Import of uClinux for RC20x board jcastillo 6781d 00h /
1622 First Import of uClinux for RC20x board jcastillo 6781d 00h /
1621 First Impot jcastillo 6781d 01h /
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6785d 21h /
1619 Fixed types in function declaration jcastillo 6786d 02h /
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6786d 08h /
1617 *** empty log message *** phoenix 6786d 08h /
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6786d 09h /
1615 *** empty log message *** phoenix 6786d 09h /
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6796d 09h /
1613 change default phoenix 6801d 18h /
1612 major optimizations for or32 target phoenix 6801d 19h /
1611 This commit was manufactured by cvs2svn to create tag 'stable_0_2_0_rc2'. 6804d 20h /
1610 Update ChangeLog nogj 6804d 20h /
1609 0.2.0-rc2 release nogj 6804d 21h /
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6805d 15h /
1607 Don't drop cycles from the scheduler nogj 6805d 15h /
1606 fix uninitialized reads phoenix 6805d 20h /

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