URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 171

Rev	Log message	Author	Age	Path
171	Added monitor.v and timescale.v	lampret	8393d 04h	/
170	Added cfg regs. Moved all defines into one defines.v file. More cleanup.	lampret	8393d 04h	/
169	Fixed memory cells. Moved monitor.h into monitor.v	lampret	8393d 04h	/
168	Major clean-up.	lampret	8396d 18h	/
167	- SPR values corrected - testbenches now work - lot of optimizations, use --disable-debugmod for optimal performance - some tick timer bugs fixed	markom	8397d 17h	/
166	Fixed RAM's oen bug. Cache bypass under development.	lampret	8415d 04h	/
165	Added variable ack of WB transfers (see NODELAY_WBx).	lampret	8415d 04h	/
164	* empty log message *	lampret	8417d 07h	/
163	Forgot files.f file.	lampret	8417d 07h	/
162	Benches (under development).	lampret	8417d 07h	/
161	Development version of RTL. Libraries are missing.	lampret	8417d 07h	/
160	simulation script	lampret	8417d 07h	/
159	synthesis scripts	lampret	8417d 07h	/
158	Initial RTEMS import	chris	8426d 22h	/
157	Update	simons	8434d 00h	/
156	File moved to opcode.	simons	8434d 01h	/
155	Update	simons	8434d 01h	/
154	Updated for new runtime environment	chris	8440d 01h	/
153	Writes to SPR_PC are now enabled	chris	8440d 01h	/
152	Breakpoint exceptions from single step are not printed now.	chris	8440d 01h	/