URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 360

Rev	Log message	Author	Age	Path
360	Added OR1200_REGISTERED_INPUTS.	lampret	8397d 03h	/
359	Added optional sampling of inputs.	lampret	8397d 03h	/
358	Fixed virtual silicon single-port rams instantiation.	lampret	8397d 03h	/
357	Fixed dbg_is_o assignment width.	lampret	8397d 03h	/
356	Break point bug fixed	simons	8397d 06h	/
355	uart VAPI model improved; changes to MC and eth.	markom	8397d 13h	/
354	Fixed width of du_except.	lampret	8397d 23h	/
353	Cashes disabled.	simons	8398d 10h	/
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8399d 13h	/
351	Fixed some l.trap typos.	lampret	8399d 14h	/
350	For GDB changed single stepping and disabled trap exception.	lampret	8399d 16h	/
349	Some bugs regarding cache simulation fixed.	simons	8401d 04h	/
348	Added instructions on how to build configure.	ivang	8402d 12h	/
347	Added CRC32 calculation to Ethernet	erez	8403d 09h	/
346	Improved Ethernet simulation	erez	8403d 11h	/
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8403d 11h	/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8403d 13h	/
343	Small touches to test programs	erez	8403d 15h	/
342	added exception vectors to support and modified section names	markom	8404d 12h	/
341	added VAPI for uart; uart 16550 support, some bugs fixed	markom	8404d 14h	/