URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 363

Rev	Log message	Author	Age	Path
363	program can be stepped and continued before running it, supporting low level debugging	markom	8495d 15h	/
362	some changes based on current modifications to or1k; cleaner register naming; ctrl-c causes stepi; write&read pc work on next instruction	markom	8495d 20h	/
361	set config command added; config struct has been divided into two structs - config and runtime; -f option allows multiple config scripts	markom	8495d 21h	/
360	Added OR1200_REGISTERED_INPUTS.	lampret	8496d 07h	/
359	Added optional sampling of inputs.	lampret	8496d 07h	/
358	Fixed virtual silicon single-port rams instantiation.	lampret	8496d 07h	/
357	Fixed dbg_is_o assignment width.	lampret	8496d 07h	/
356	Break point bug fixed	simons	8496d 10h	/
355	uart VAPI model improved; changes to MC and eth.	markom	8496d 17h	/
354	Fixed width of du_except.	lampret	8497d 04h	/
353	Cashes disabled.	simons	8497d 14h	/
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8498d 17h	/
351	Fixed some l.trap typos.	lampret	8498d 19h	/
350	For GDB changed single stepping and disabled trap exception.	lampret	8498d 20h	/
349	Some bugs regarding cache simulation fixed.	simons	8500d 09h	/
348	Added instructions on how to build configure.	ivang	8501d 16h	/
347	Added CRC32 calculation to Ethernet	erez	8502d 14h	/
346	Improved Ethernet simulation	erez	8502d 15h	/
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8502d 15h	/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8502d 17h	/