OpenCores
URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 573

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
573 Fixed module name when compiling with OR1200_XILINX_RAM32X1D lampret 8342d 02h /
572 Some new bugs fixed. simons 8342d 11h /
571 Changed alignment exception EPCR. Not tested yet. lampret 8342d 11h /
570 Fixed order of syscall and range exceptions. lampret 8342d 13h /
569 Default ASIC configuration does not sample WB inputs. lampret 8342d 22h /
568 include command added to cfg script markom 8342d 23h /
567 Commit lapsus fixed. simons 8342d 23h /
566 Fast sim switch fixed. simons 8343d 00h /
565 Regular update for new test cases. lampret 8343d 02h /
564 Updated test cases to use l.nop K instead of l.mtspr 0x1234 and l.sys 20x. lampret 8343d 02h /
563 Added debug model for testing du. Updated or1200_monitor. lampret 8343d 02h /
562 Fixed mem2reg bug in FAST implementation. Updated debug unit to work with new genpc/if. lampret 8343d 02h /
561 Tick timer is not connected to PIC. simons 8343d 15h /
560 some code cleanup markom 8345d 23h /
559 Fixed bug in SET_FIELD macro. (setting register field to 0 is not such a good idea) ivang 8346d 19h /
558 nop statistics removed markom 8346d 21h /
557 some optimizations; fsim running at 2MIPS; pm section added to config; configure bug fixed markom 8346d 22h /
556 support for SPR_SR_EP added; cpu.sr added to config markom 8347d 00h /
555 stats 1 requirement bug fixed markom 8347d 01h /
554 memory fill bug fixed markom 8347d 01h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.