URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 641

Rev	Log message	Author	Age	Path
641	Modified logging of SPR accesses. Logging only explicit instruction accesses.	ivang	8421d 11h	/
640	Merge profiler and mprofiler with sim.	ivang	8421d 13h	/
639	MMU cache inhibit bit test added.	simons	8424d 03h	/
638	TLBTR CI bit is now working properly.	simons	8424d 04h	/
637	Updated file names.	lampret	8424d 05h	/
636	Fixed combinational loops.	lampret	8424d 05h	/
635	Fixed Makefile bug.	ivang	8424d 07h	/
634	configure.in : fixed to build start/Makefile start.S : l.jalr r9 -> l.jr r9 Added missing files.	ivang	8425d 08h	/
633	Bug fix in command line parser.	ivang	8425d 09h	/
632	profiler and mprofiler merged into sim.	ivang	8426d 04h	/
631	Real cache access is simulated now.	simons	8427d 02h	/
630	some bug fixes in store buffer analysis	markom	8427d 12h	/
629	typo fixed	markom	8427d 15h	/
628	This commit was manufactured by cvs2svn to create tag 'pre-GNU-merge'.		8427d 16h	/
627	or32 restored	markom	8427d 16h	/
626	store buffer added	markom	8427d 16h	/
625	Bus error bug fixed. Cache routines added.	simons	8428d 08h	/
624	Added logging of writes/read to/from SPR registers.	ivang	8428d 08h	/
623	update based on recent changes; arithmetic instructions does not modify carry yet	markom	8428d 10h	/
622	Cache test works on hardware.	simons	8428d 13h	/