URL https://opencores.org/ocsvn/or1k_old/or1k_old/trunk

Subversion Repositories or1k_old

[/] - Rev 988

Rev	Log message	Author	Age	Path
988	ORP architecture supported.	simons	8053d 12h	/
987	ORP architecture supported.	simons	8053d 19h	/
986	outputs out of function are not registered anymore	markom	8053d 20h	/
985	DTLB translation doesn't work on or1ksim when IC/DC enabled.	lampret	8054d 07h	/
984	Disable SB until it is tested	lampret	8054d 07h	/
983	First checkin	lampret	8054d 09h	/
982	Moved to sim/bin	lampret	8054d 09h	/
981	First checkin.	lampret	8054d 09h	/
980	Removed sim.tcl that shouldn't be here.	lampret	8054d 09h	/
979	Removed old test case binaries.	lampret	8054d 09h	/
978	Added variable delay for SRAM.	lampret	8054d 10h	/
977	Added store buffer.	lampret	8054d 10h	/
976	Added store buffer	lampret	8054d 10h	/
975	First checkin	lampret	8054d 10h	/
974	Enabled what works on or1ksim and disabled other tests.	lampret	8054d 12h	/
973	generated cuc top scheduler builds without syntax errors; not tested yet	markom	8056d 16h	/
972	Interrupt suorces fixed.	simons	8056d 16h	/
971	Now even keyboard test passes.	simons	8056d 19h	/
970	Testbench is now running on ORP architecture platform.	simons	8057d 08h	/
969	Checking in except directory.	lampret	8057d 23h	/