OpenCores
URL https://opencores.org/ocsvn/pci/pci/trunk

Subversion Repositories pci

[/] - Rev 104

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
104 Found and simulated the problem in the synchronization logic.
Repaired the synchronization logic in the FIFOs.
mihad 7890d 19h /
103 Added test application and modified files to support it. mihad 7937d 16h /
102 Cleanup! mihad 7937d 16h /
101 Added simulation files. mihad 7937d 16h /
100 Cleanup! mihad 7937d 16h /
99 Cleanup! mihad 7937d 17h /
98 Cleanup. mihad 7937d 17h /
97 Doing a little bit of cleanup. mihad 7937d 17h /
96 Update! mihad 7937d 17h /
95 Removed this file, because it was too large - long download time. mihad 7937d 17h /
94 Changed one critical PCI bus signal logic. mihad 7937d 17h /
93 Added a test application! mihad 7938d 00h /
92 Update! mihad 7938d 01h /
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7973d 15h /
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7973d 15h /
89 Burst 2 error fixed. mihad 8009d 15h /
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.
mihad 8015d 14h /
87 Updated acording to RTL changes. mihad 8027d 12h /
86 Entered the option to disable no response counter in wb master. mihad 8027d 12h /
85 Changed Vendor ID defines. mihad 8027d 16h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.