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Rev Log message Author Age Path
96 Update! mihad 7937d 19h /
95 Removed this file, because it was too large - long download time. mihad 7937d 19h /
94 Changed one critical PCI bus signal logic. mihad 7937d 19h /
93 Added a test application! mihad 7938d 03h /
92 Update! mihad 7938d 03h /
91 WebPack 5.2 constraint file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7973d 17h /
90 WebPack 5.2 project file for PCI CRT application was contributed by Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de) tadejm 7973d 17h /
89 Burst 2 error fixed. mihad 8009d 17h /
88 Added the reset value parameter to the synchronizer flop module.
Added resets to all synchronizer flop instances.
Repaired initial sync value in fifos.
mihad 8015d 16h /
87 Updated acording to RTL changes. mihad 8027d 14h /
86 Entered the option to disable no response counter in wb master. mihad 8027d 14h /
85 Changed Vendor ID defines. mihad 8027d 18h /
84 Changed vendor ID. mihad 8031d 13h /
83 Cleaned up the code. No functional changes. mihad 8056d 11h /
82 This commit was manufactured by cvs2svn to create tag 'rel_5'. 8070d 07h /
81 Updated synchronization in top level fifo modules. mihad 8070d 07h /
80 This commit was manufactured by cvs2svn to create tag 'rel_4'. 8073d 12h /
79 Updated. mihad 8073d 12h /
78 Old files with wrong names removed. mihad 8073d 13h /
77 Changed module and file names. Updated scripts accordingly. FIFO synchronizations changed. mihad 8073d 13h /

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