OpenCores
URL https://opencores.org/ocsvn/pci_blue_interface/pci_blue_interface/trunk

Subversion Repositories pci_blue_interface

[/] - Rev 41

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
41 odds and ends in the master. Parity mostly. Not debugged. bbeaver 8499d 08h /
40 more improvements to master bbeaver 8499d 22h /
39 Master Retries seem OK.
Working on flushing, increasing test coverage.		 bbeaver 8500d 03h /
38 working on master. bbeaver 8501d 01h /
37 Getting Master Abort Timers to have correct values bbeaver 8505d 02h /
36 more progress onthe master side bbeaver 8505d 12h /
35 Made the compromise that the FIFOs and the PCI Bus
will be the same width. No 32/64 combinations.
Working on Master.		 bbeaver 8506d 06h /
34 Starting to remove extra logic in PCI Master bbeaver 8513d 03h /
33 Polishing the PCI Master. bbeaver 8514d 01h /
32 Starting to get simplified Master State Machine to do something.
NOTE: This has not been optimized to fit into CLB's yet.		 bbeaver 8519d 03h /
31 Still messing with Master State Machine bbeaver 8528d 04h /
30 Fixed various problems with new function for Master State Machine. bbeaver 8535d 05h /
29 Changed Master State Machine to be function based.
This will make it possible to pipeline it better.		 bbeaver 8535d 06h /
28 Renamed all the combinational control signals to have
names ending in "_critical".		 bbeaver 8535d 10h /
27 Massive edit to start changing many `defines into Parameters.
This MIGHT (?) make it possible to have more than 1 PCI interface,
but with different bus sizes.
On the other hand, it might be an idiotic change in style.		 bbeaver 8536d 02h /
26 Finished code formatting changes.
Need to add state bit which knows to Retry or not.
Now trying to get Master State Machine to actually operate.		 bbeaver 8536d 08h /
25 Continuing to improve the Master. bbeaver 8537d 05h /
24 Finally got Master to start capturing Retry Address and Data correctly. bbeaver 8537d 10h /
23 Continuing work on Master.
No simulation activity yet.		 bbeaver 8538d 05h /
22 Made giant pass through files to try to paramaterize the FIFO and PCI Bus size.
Probably broke everything.
In pci_blue_master, made many changes to handle FIFO unloads
In pci_fifos, simplified FIFOs. All the tricky stuff is now in the reader and writer		 bbeaver 8539d 03h /

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.